1. Technical Field
The present invention relates generally to power regulation and in particular to multiple processor machines. Still more particularly, the present invention relates to a voltage regulation system, method of operation and multiple processor apparatus employing the system or method.
2. Description of the Related Art
With the proliferation of small computers and the extension of their use into more powerful applications and network-centric computing environments, the performance requirements for these computing machines are increasing to ever higher levels. Consequently, the application of multiple processors, or N-way processors, are increasingly being applied in lower-end, i.e., lower cost, machines.
As processor performance has increased, voltage levels used to power these processors has correspondingly decreased. Additionally, as input voltage levels have decreased, input current has increased along with dynamic current effects needed to support higher speed operation of these processors. This has necessitated the need for "point of load" voltage regulation that is implemented in close proximity to the processor. To provide for this point of load voltage regulation, small Voltage Regulator Modules (VRMs) are becoming standard devices and are presently employed to power these new low voltage processors.
Currently, in multiple processor, or N-way processor machines, each processor is typically powered by two paralleled VRMs. Additionally, in certain custom designs, a bank of processors is powered by a N+1 (where N is the minimum number of regulator required to run the processor bank) bank of regulator engines. In both cases, redundancy in the VRMs is utilized to keep all the processors in operation in the event of a failure in the voltage regulation stage that is powering the processor or processors. Both of the above-described redundant systems, i.e., parallel and N+1, however, are not 100% fault tolerant. There are certain failure modes, e.g., a short circuit condition in a processor supported by the VRMs, that may shut down the entire system. This lack of robustness permits a failure in a single processor to take down the entire multiple processor machines.
Furthermore, with lower-end multiple processor machines, cost considerations are of paramount importance. The implementation of redundant systems, as described above, invariably increases the cost of multiple processor machines. For example, in a dual redundant system wherein two VRMs are used to power a single processor, the cost of the multiple processor machine attributable to the VRMs are doubled. Similarly, employing a N+1 bank of regulator engines also raises the cost and complexity of a multiple processor machine due to the added regulator, along with the complex monitoring and switching circuitry that must be employed to ensure that all the processors are in operation.
Accordingly, what is needed in the art is an improved voltage regulation system that mitigates the above-described limitations and, more particularly, a voltage regulation system that is more robust and cost effective to implement in a multiple processor machine.